Chapter 6

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Digital Logic Gates

Boolean Algebra
A\oplus B
0 0 1 1 0
0 1 1 0 1
1 0 1 0 1
1 1 0 0 0

De Morgan Laws & NAND Equivalent Gates

  • "If the variables in a logic expression are replaced by their inverses, and if the AND operation is replaced by OR, the OR operation is replaced by AND, and the expression is inverted, the resulting logic expression yields the same values as before the changes."<ref>Electronics p.353</ref>
  • It is possible to create any combinatorial logic function with solely NAND (or NOR) gates
Gate Symbol NAND equivalent
Inverter \overline{A} \overline{AA}
AND AB \overline{(\overline{A}+\overline{B})}
OR A+B \overline{(\overline{A} \, \overline{B})}

CMOS Inverter

  • Zero static power consumption
  • KP_p=\frac{1}{2}KP_n, thus \frac{W}{L}_p=2\frac{W}{L}_n to maintain symmetric transfer characteristics.


  • p.365: Why even have R_on?
  • p.377: What problems are there with the NMOS pull-up?
  • p.382: For CMOS, are the transistors in Triode or Saturation when they're in the "ON" state? How can we tell?