Chapter 6: Difference between revisions
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*'''NAND Equivalent Gates''' | *'''NAND Equivalent Gates''' | ||
:*Inv: <math>\overline{AA}=\overline{A}</math>, Nand with the inputs tied together | :*Inv: <math>\overline{AA}=\overline{A}</math>, Nand with the inputs tied together | ||
Revision as of 20:10, 23 March 2010
Digital Logic
| A | B | NAND |
NOR |
XOR |
|---|---|---|---|---|
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 0 |
- NAND Equivalent Gates
- Inv: , Nand with the inputs tied together
- AND: , NAND followed by and Inv
- OR:
- De Morgan Laws