Chapter 6
Digital Logic
| A | B | NAND |
NOR |
XOR |
|---|---|---|---|---|
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 0 |
- NAND Equivalent Gates
- Inv: , Nand with the inputs tied together
- AND: , NAND followed by and Inv
- OR:
- De Morgan Laws
| A | B | NAND |
NOR |
XOR |
|---|---|---|---|---|
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 0 |