Quiz 6.3
Sections start their location counters at zero. The .bss directives don't advance the counter, because they go off to a different section. Assembly instructions take up bytes of memory according to what they are and their addressing mode. Whenever a .sect happens the location counter is reset to zero. There is more in section 2 of this TI Manual on the Assembler. I'm not certain about these, but here is what I came up with, as my best guess. This quiz is more tailored to the old Assembly List file, that has a field for the section counter. Code Composer Studio
- 0x0000
- 0x0000
- 0x0000
- 0x0002
- 0x0008
- 0x000a
- 0x000c
- 0x000e
- 0x000e
- 0x0010
- 0x0002
- 0x0000
- 0x0000
You can get the Assembly List file by going into the Build Settings->Build->Advanced Options->Assembler, and tick the Generate listing file box. Here is the listing file I got using the MSP430G2553 processor.
MSP430 Assembler Unix v15.12.3 Tue Nov 1 17:48:13 2016 Tools Copyright (c) 2003-2015 Texas Instruments Incorporated ../main.asm PAGE 1 1 .cdecls C,"msp430.h" ; include c header 2 000000 .bss cnt,2 ; WDT second counter 3 000002 .bss cat,4 4 000000 .text ; program section 5 000000 4031 start: mov.w #0x0400,SP ; set stack pointer 000002 0400 6 000004 40B2 mov.w #0x5a18,&WDTCTL ; set WD timer interval 000006 5A18 000008 0000! 7 00000a 40B2 mov.w #0x00fa,&cnt ; 1 sec WD counter 00000c 00FA 00000e 0000! 8 000010 43D2 mov.b #0x01,&IE1 ; enable WDT interrupt 000012 0000! 9 000014 D3D2 bis.b #0x01,&P1DIR ; P1.0 output 000016 0000! 10 000018 D032 bis.w #0x0018,SR ; enable interrupts 00001a 0018 11 000006 .bss dog,2 12 00001c E3D2 wdt_isr: xor.b #0x01,&P1OUT ; toggle P1.0 00001e 0000! 13 000020 1300 reti ; return from interrupt 14 000000 .sect ".int10" ; WDT vector section 15 000000 0000! .word wdt_isr ; Watchdog ISR 16 000000 .sect ".reset" ; PUC vector section 17 000000 0000! .word start ; RESET ISR 18 .end No Assembly Errors, No Assembly Warnings
You can see that my guess wasn't right. The second column of numbers is the location counter. :-)